What Jabil taught me about the distance between a fab announcement and a production line that can actually ship
At Jabil, I learned how complete a factory can look while still being unable to ship. The people can be staffed, the tooling ready, and every other component kitted. If one qualified memory device is missing, the line waits.
That experience left me with a distinction that market commentary often misses:
The market talks about a category. A factory needs an exact part number.
A chart can say memory supply is improving. A supplier can announce billions of dollars in new capacity. Contract prices can rise more slowly. None of that releases a production line waiting for one approved component, in the right package, at the required volume, on the required date.
That is the lens through which I read the memory shortage.
This is a story of three clocks: the years required to build a fab, the time required to turn first wafers into dependable chip volume, and the work required to qualify those chips inside a stable finished-product line.
The market tends to compress those clocks into one because announced capacity is easy to count. Operations cannot.
The shortage is splitting
The first-quarter numbers were extraordinary. TrendForce reported that conventional DRAM contract prices rose roughly 93 to 98 percent quarter over quarter in Q1 2026. In Q2, total DRAM industry revenue rose another 59.5 percent, driven mainly by higher prices while bit shipments increased only modestly.
By the fourth quarter, the picture had become more complicated. TrendForce projected a slower 10 to 15 percent quarterly increase in conventional DRAM contract prices. At the same time, it said suppliers were still prioritizing advanced capacity for server products, the overall market remained undersupplied, and server DRAM would remain short of demand.
Those facts are not contradictory. A slower rate of increase is not a return to normal. Consumer demand can weaken while a server market remains undersupplied. An average can improve because buyers have pulled back, even while a particular qualified device remains unavailable.
From an operating perspective, that is segmentation and, in some markets, demand destruction. It is not restored capacity.
A factory does not build from an average.
The clocks behind a capacity announcement
The fab clock
Micron’s 2026 annual filing gives us a useful physical calendar. Construction of its first Boise fab began in October 2023, with first DRAM wafer output projected for mid-2027. Construction activity on a second Idaho fab began in 2026, with initial wafer output expected in late 2028. Its first New York fab broke ground in January 2026; initial wafer output is expected in 2030.
These are projected milestones, not guarantees. They also describe first or initial wafer output. They do not mean full volume, mature yield, or a component delivered to a customer.
The years between groundbreaking and first wafer are not empty time in a supply model. They are the work of turning capital into cleanrooms, utilities, installed tools, trained people, and a controlled manufacturing process.
The chip clock
First wafer is a milestone. It is not usable supply.
The Semiconductor Industry Association has estimated about 24 weeks to refine a fabrication process and ramp production yield and volume. Even after a process is established, a finished chip can take up to 26 weeks from order to delivery. Wafer fabrication averages about 12 weeks and can take 14 to 20 weeks for advanced processes; back-end assembly, testing, and packaging can add as much as six weeks.
These figures are general process benchmarks, not a current promise for every memory part, and they should not be added mechanically into one forecast. Some work overlaps. The point is that first wafer does not erase the remaining clock.
That is why I am careful with the phrase “comes online.” It can mean that a building is ready, a cleanroom is open, tools are installed, first wafers have run, yield is improving, or customer product is shipping. Those are different events.
SK hynix’s Indiana project makes the distinction visible. Its current official schedule calls for the cleanroom to open by October 2028 and mass production of next-generation HBM to begin in the second half of 2029. The company also says the wafers will be produced in Korea, then sent to Indiana for advanced packaging and testing.
The Indiana investment is real and strategically important. It adds back-end capacity. It does not create a new source of front-end DRAM wafers. Calling both things a fab can hide the constraint instead of explaining it.
The product line clock
Then comes the part I learned to respect at Jabil.
A packaged chip is still only one input to a shippable product. The exact device has to be approved for the design. The product and process have to be validated. Test coverage, tooling, work instructions, material flow, and line yield have to settle into something repeatable.
If a substitute is required, part of that work can start again. In the automotive market, McKinsey has estimated that switching to a different semiconductor manufacturer typically adds a year or more because the design may need to change and the alternative supplier must pass a lengthy qualification process. The timing varies by product and industry, but the operating lesson travels well: an available substitute is not automatically an approved substitute.
There is no honest universal answer to the question, “How long after the chip fab?” The interval depends on yield, package, test capacity, customer qualification, the industry, and whether the part is a true drop-in replacement. The evidence does tell us that it can run for quarters, and a high-reliability substitution can take a year or more.
Most shortage forecasts stop when semiconductor supply appears. The factory’s risk continues until a qualified part arrives at rate and a stable line can turn it into sellable product, repeatedly and at the required yield.
AI changed the queue
AI did not simply add demand. It changed which products suppliers have the strongest incentive to make.
TrendForce estimates that HBM and RDIMM together will account for 51 percent of DRAM bit supply in 2026. Suppliers are responding rationally to demand, pricing, and margin. A rational choice upstream can still create painful consequences downstream.
An industrial, automotive, medical, or consumer product does not need to have anything to do with AI to compete with it for memory capacity. The competition happens before the component reaches the bill of materials. By the time a buyer sees a higher quote or an allocation notice, the capacity decision may already be embedded in product mix, long-term agreements, and a multiyear fab plan.
That changes the procurement question. Cost still matters, but it is no longer enough to ask what a part costs today. We also need to ask who else is competing for the capacity behind it, how secure the allocation is, and how long it would take to qualify another path.
Where the shortage reaches people
We call this a memory cycle because that is how the industry measures it. People experience it differently.
They see a higher price for the same device. A delayed product. A lower memory configuration. Engineers spend time on a redesign that makes the product available without making it better. A family postpones a purchase because the entry-level model no longer makes economic sense.
IDC forecasts global smartphone shipments to fall 13.9 percent in 2026, with the memory shortage as the primary, though not the only, driver. It expects the greatest pain at the bottom of the market, where margins are thinnest and customers are most sensitive to every dollar.
That is how an upstream allocation decision reaches a household. Not as a wafer chart, but as less product for more money, or no affordable product at all.
The bottleneck will move downstream
The next mistake would be to treat memory as a self-contained shortage. A CPU is not a shippable server or PC. It still needs qualified memory, a motherboard, and a working power path. If one input is missing, the rest wait.
The pressure is already spreading. TrendForce projects server CPU shipments to grow by more than 40 percent in 2027 as AI inference expands. Those CPUs also pull DDR5, power modules, and high-capacitance MLCCs; TrendForce expects the MLCC shortage to persist through the first half of 2027.
Memory is unlikely to be the last constraint. IDC expects advanced packaging, semiconductor substrates, optical components, power parts, and liquid cooling to remain constrained through 2027, with memory tight into 2028. A manufacturer can have the CPU and still lack the memory. It can have both and still be held by packaging or power.
The consumer side can move in the opposite direction. IDC forecasts personal computing device shipments to decline another 3.1 percent in 2027 before returning to growth in 2028. Fewer complete systems mean fewer mainstream CPUs and adjacent parts moving through the channel. The same supply chain can be short AI-grade parts, weak in consumer demand, and long the wrong inventory.
That is the downline risk over the next several years. When memory loosens, waiting orders can expose the next constraint. Other orders may never return because higher prices have already pushed buyers out. The result is more likely to be a rolling series of imbalances than a synchronized recovery.
I do not expect the shortage to end everywhere at once. Price may stabilize first. Broad supply may improve next. A qualified part can remain constrained after both. The production line may recover last.
That is not a date forecast. It follows the order in which manufacturing has to work.
At Jabil, I learned that capacity is not a press release, a cleanroom, or even a wafer. It becomes real when the right part arrives, qualifies, and moves through a stable line at rate.
Capital can turn in a quarter. Concrete, yield, qualification, and final assembly answer on different clocks.
The market counts capacity when it is announced. A factory counts it when it can ship.